A multiphase voltage regulator has a plurality of phases operated at the same fixed switching frequency for delivering current to a load. Multiphase voltage regulators are typically controlled so as to distribute current evenly across the phases, also referred to as current balance. The load powered by the regulator may be dynamic in that the load current changes very quickly (i.e. high di/dt) and with a high repetition rate (frequency). If the load current changes repetitively at a frequency that is at or near the fixed switching frequency (Fsw) of the multiphase voltage regulator or ½ Fsw, aliasing occurs. Because the voltage loop gain of the controller is not zero under such dynamic load transient conditions, the control loop drives the phase currents to circulate at a beat frequency rate which is the delta frequency between Fsw and the transient load frequency when aliasing occurs. One or more of the phase currents may exceed the inductor saturation current limit or the power stage peak current limit due to this aliasing effect, which could result in catastrophic system damage.
One conventional approach for mitigating the aliasing problem involves clamping the phase currents to a safe level by truncating the PWM (pulse width modulation) pulses applied to the phases when a phase current exceeds the preset peak-to-peak current limit, and tri-stating the PWM pulses or turning on the high-side switch device of a phase when a phase current is lower than the negative current limit. However, with this approach, output voltage regulation is affected with undershoot and overshoot excursions.
Another conventional approach for mitigating the aliasing problem involves lowering the voltage feedback loop bandwidth of the multiphase regulator controller and allowing the output capacitance of the regulator system to handle high-frequency load transients. However, with this approach, an excessive amount of output capacitance is required to reduce output voltage undershoot or overshoot during large step load transients (e.g. 10 A to 200 A or vice-versa).
Yet another conventional approach for mitigating the aliasing problem involves increasing the bandwidth of the current balance control loop of the multiphase regulator controller. However, with this approach, the increased current balance bandwidth reduces the voltage loop gain/phase margin and hence degrades the stability of the output voltage loop of the controller.
Thus, there is a need for a more effective aliasing avoidance mechanism for multiphase voltage regulators.